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 Ordering number : ENA1408A
Bi-CMOS LSI
LV49152V
Overview
Class-D Audio Power Amplifier
BTL 15W x 2ch
The LV49152V is a 15W per channel stereo digital power amplifier that takes analog inputs. The LV49152V uses unique SANYO-developed feedback technology to achieve excellent audio quality despite being a class D amplifier and can be used to implement high quality flat display panel (FDP) based systems.
Features
* BTL output, class D amplifier system * Unique SANYO-developed feedback technology achieves superb audio quality * High-efficiency class D amplifier * Soft muting function reduces impulse noise at power on/off * Full complement of built-in protection circuits : over current protection, thermal protection, and low power supply voltage protection circuits * Built in Power limiter
Functions
* Power : 15W x 2ch output (VD = 15V, RL = 8, fin = 1kHz, AES17, THD + N = 10%) * Efficiency : 93% (VD = 15V, RL = 8, fin = 1kHz, PO = 15W) * THD + N : 0.08% (VD = 15V, RL = 8, fin = 1kHz, PO = 1W, Filter : AES17) * Noise : 90Vrms (Filter : A-weight) * Package SSOP44J (275mil)
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment.
40109 MS 20090312-S00013 / 21809 MS PC No.A1408-1/24
LV49152V
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter Maximum supply voltage Allowable power dissipation Package thermal resistance Symbol VD Pd max jc Supply voltage Our PCB, Soldered * Our PCB, Soldered * Our PCB, Not soldered * Maximum junction temperature Operating temperature Storage temperature Tj max Topr Tstg Conditions Ratings 20 5.05 2.1 3.6 150 -25 to +75 -50 to +150 Unit V W C/W C/W C C C
* : Mounted on a specified board 11.0mm x 9.5mm x 1.5mm, glass epoxy (two-layer)
Recommended Operating Range at Ta = 25C
Parameter Supply voltage range Load impedance range Symbol VD RL Supply voltage Speaker load Conditions min 9 4 Ratings typ 15 8 max 18 V Unit
Electrical Characteristics at Ta = 25C, VD = 15V, RL = 8, L = 33H (TOKO : A7502BY-330M), C = 0.1F, CL = 0.47F
Parameter Standby current Mute current Quiescent current Voltage gain Offset voltage Total harmonic distortion Output power Channel separation Ripple rejection ratio Noise High-level input voltage Low-level input voltage Under voltage protection UPPER Under voltage protection LOWER Symbol Ist Imute ICCO VG Voffset THD+N PO@10% CHsep. SVRR VNO VIH VIL UV_UPPER UV_LOWER Conditions min STBY = L, MUTE = L STBY = H, MUTE = L STBY = H, MUTE = H fin = 1kHz, VO = 0dBm Rg = 0 PO = 1W, fin = 1kHz, AES17 THD+N = 10%, AES17 Rg = 0, VO = 0dBm, DIN AUDIO fr = 100Hz, Vr = 0dBm, Rg = 0, DIN AUDIO Rg = 0, A-weight STBY and MUTE pin STBY and MUTE pin VD voltage measure VD voltage measure 3 0 8.0 7.0 13 55 50 14 35 28 -150 0.08 15 70 60 90 300 VD 1 Ratings typ 1 20 45 30 max 10 26 55 32 150 0.4 A mA mA dB mV % W dB dB Vrms V V V V Unit
Note : The values of these characteristics were measured in the SANYO test environment. The actual values in an end system will vary depending on the printed circuit board pattern, the external components actually used, and other factors.
No.A1408-2/24
LV49152V
Package Dimensions
unit : mm (typ) 3285
TOP VIEW 15.0 44 23 Exposed Die-Pad BOTTOM VIEW
5.6 7.6
1 (0.68)
0.65
0.22
22
0.2
SIDE VIEW
(1.5)
1.7max
0.5
SANYO : SSOP44J(275mil)
8
Pd max - Ta
Mounted on a specified board : 11.0 x 9.5 x 1.5mm3 glass epoxy (two-layer)
Allowable power dissipation, Pd max - W
6
Soldered = 5.05W
4
Not Soldered = 3.35W
2
0 - 25
0
25
50
75
100
125
150
Ambient temperature, Ta - C
Pin Assignment
BOOT1+ BOOT2+ BOOT1BOOT2PGND1 PGND1 PGND2 PGND2 OUT1+ OUT1+ OUT2+ OUT2+ OUT1OUT1OUT2OUT2VDD1 VDD2 PVD1 PVD1 PVD2
24 21
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
23
LV49152
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
22
MUTE
STBY
VIN1+
VIN1-
BIASCAP
VBIAS
VIN2-
VIN2+
VREG5
MUTECAP
GND
PLC
NC
NC
NC
NC
NC
NC
NC
NC
VCC
Top view
NC
No.A1408-3/24
PVD2
LV49152V
Block Diagram and Application Circuit Example 1 (RL = 8)
+
MUTE STBY FB OUTPUT 41 REC. & CONT. VDD1 40 39 38 MUTECAP VCC BIASCAP VBIAS VREG5 GND NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 FB OUTPUT 25 PVD2 PVD2 24 23 REC. & CONT. VDD2 OUTPUT 30 29 28 27 26 BOOT2+ OUT2+ OUT2+ START SEQUENCE POWER LIMITER FB FB OUTPUT 36 PGND1 PGND1 PGND2 PGND2 35 34 33 32 31 OUT2OUT237 BOOT1OUT1OUT1PVD1 PVD1
470F
1F 44 43 42 OUT1+ OUT1+ BOOT1+ 0.1F 0.1F 0.47F RL 33H
0-5V 0-5V VIN1+ 1F 1F 1F
1 2 3 4 5 0 to 20k 1F 6 7 8 22F 9 1F 1F 1F 1F 13 14 15 16 17 18 19 20 21 22 10 11 12
VIN1PLC VIN 2-
0.22F
VIN
2+
1F
0.1F
0.1F
+
33H VD
33H
0.1F BOOT20.22F
0.1F 0.47F RL
0.1F
0.1F
33H
1F
+
470F
No.A1408-4/24
LV49152V
Application Circuit Example 2 (RL = 6)
+
MUTE STBY FB OUTPUT 41 REC. & CONT. VDD1 40 39 38 MUTECAP VCC BIASCAP VBIAS VREG5 GND NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 FB OUTPUT 25 PVD2 PVD2 24 23 REC. & CONT. VDD2 OUTPUT 30 29 28 27 26 BOOT2+ OUT2+ OUT2+ START SEQUENCE POWER LIMITER FB FB OUTPUT 36 PGND1 PGND1 PGND2 PGND2 35 34 33 32 31 OUT2OUT237 BOOT1OUT1OUT1PVD1 PVD1
470F
1F 44 43 42 OUT1+ OUT1+ BOOT1+ 0.1F 0.15F 0.68F RL 22H
0-5V 0-5V VIN1+ 1F 1F 1F
1 2 3 4 5 0 to 20k 1F 6 7 8 22F 9 1F 1F 1F 1F 13 14 15 16 17 18 19 20 21 22 10 11 12
VIN1PLC VIN 2-
0.22F
VIN
2+
1F
0.1F
0.15F
+
22H VD
22H
0.1F BOOT20.22F
0.15F 0.68F RL
0.1F
0.15F
22H
1F
+
470F
No.A1408-5/24
LV49152V
Application Circuit Example 3 (RL = 4)
+
MUTE STBY FB OUTPUT 41 REC. & CONT. VDD1 40 39 38 MUTECAP VCC BIASCAP VBIAS VREG5 GND NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 FB OUTPUT 25 PVD2 PVD2 24 23 REC. & CONT. VDD2 OUTPUT 30 29 28 27 26 BOOT2+ OUT2+ OUT2+ START SEQUENCE POWER LIMITER FB FB OUTPUT 36 PGND1 PGND1 PGND2 PGND2 35 34 33 32 31 OUT2OUT237 BOOT1OUT1OUT1PVD1 PVD1
470F
1F 44 43 42 OUT1+ OUT1+ BOOT1+ 0.1F 0.22F 1F RL 15H
0-5V 0-5V VIN1+ 1F 1F 1F
1 2 3 4 5 0 to 20k 1F 6 7 8 22F 9 1F 1F 1F 1F 13 14 15 16 17 18 19 20 21 22 10 11 12
VIN1PLC VIN 2-
0.22F
VIN
2+
1F
0.1F
0.22F
+
15H VD
15H
0.1F BOOT20.22F
0.22F 1F RL
0.1F
0.22F
15H
1F
+
470F
No.A1408-6/24
LV49152V
Pin Equivalent Circuit
Pin No. 1 Pin name MUTE I/O I Mute control pin Description Equivalent Circuit
VD 250k 10k 100k GND
1
2
STBY
I
Standby control pin
VD 250k 10k 100k GND
2
3
VIN1+
I
Input pin, CH1 plus
VD
3
300 30k VBIAS GND
4
VIN1-
I
Input pin, CH1 minus
VD
4
300 30k VBIAS GND
5
PLC
I
Power level control pin
VD
5
200
GND
Continued on next page.
No.A1408-7/24
LV49152V
Continued from preceding page.
Pin No. 6 Pin name VIN2I/O I Description Input pin, CH2 minus Equivalent Circuit
VD
6
300 30k VBIAS GND
7
VIN2+
I
Input pin, CH2 plus
VD
7
300 30k VBIAS GND
8
MUTECAP
O
Muteing sysytem capcitor connection
VDD
VD
20k 10k
8
GND
9 VCC O Internal power supply decupling capacitor connection
VD
9
GND
10 BIASCAP O Internal regulator decupling capacitor connection
VD
100k 10 1k 1k 100k GND
Continued on next page.
No.A1408-8/24
LV49152V
Continued from preceding page.
Pin No. 11 Pin name VBIAS I/O O Internal regulator decupling capacitor connection Description Equivalent Circuit
VD
500 11 500
GND
12 VREG5 O Internal regulator decupling capacitor connection
VD
12 500 GND
13 14 15 16 17 18 19 20 21 22 23 24 25 GND NC NC NC NC NC NC NC NC NC PVD2 PVD2 OUT2+ O Analog Ground Non connection Non connection Non connection Non connection Non connection Non connection Non connection Non connection Non connection CH2 power supply CH2 power supply Output pin, CH2 plus
VD
25
GND
26 OUT2+ O Output pin, CH2 plus
VD
26
GND
Continued on next page.
No.A1408-9/24
LV49152V
Continued from preceding page.
Pin No. 27 28 29 30 Pin name BOOT2+ VDD2 BOOT2OUT2I/O I/O O I/O O Description Boot strap pin, CH2 plus CH2 internal regulator decupling capacitor connection Boot strap pin, CH2 minus Output pin, CH2 minus Equivalent Circuit
VD
30
GND
31 OUT2O Output pin, CH2 minus
VD
31
GND
32 33 34 35 36 PGND2 PGND2 PGND1 PGND1 OUT1O CH2 Power Ground CH2 Power Ground CH1 Power Ground CH1 Power Ground Output pin, CH1 minus
VD
36
GND
37 OUT1O Output pin, CH1 minus
VD
37
GND
38 39 40 BOOT1VDD1 BOOT1+ I/O O I/O Boot strap pin, CH1 minus CH1 internal regulator decupling capacitor connection Boot strap pin, CH1 plus
Continued on next page.
No.A1408-10/24
LV49152V
Continued from preceding page.
Pin No. 41 Pin name OUT1+ I/O O Description Output pin, CH1 plus Equivalent Circuit
VD
41
GND
42 OUT1+ O Output pin, CH1 plus
VD
42
GND
43 44 PVD1 PVD1 CH1 power supply CH1 power supply
No.A1408-11/24
LV49152V
Operation Mode Summary STBY mode (STBY = L and MUTE = L) Each bias becomes off state when the regulator in IC has been turned off. The most of circuits becomes off state. The supply current : 1A (typical). MUTE mode (STBY = H and MUTE = L) Each bias becomes on state when the regulator in IC has been turned on. When more than half of the circuits are active, the amplifier in the output stages become off. The supply current : 20mA (typical). Operation mode (STBY = H and MUTE = H) The LV49152V operates as D-class amplifier. The output signal is synchronized with the input signal. The supply current : 45mA (typical)
5V/DIV. STBY pin
MUTE pin
PWM STBY mode MUTE mode MUTE mode STBY mode
Operation mode
Function image
No.A1408-12/24
LV49152V
ON TIME/OFF TIME ON TIME Please secure ON TIME of 350msec or more for reducing Pop noise.
5V/DIV.
STBY pin
BIAS MUTE pin
MUTECAP pin
OUTPUTS ON TIME AMP ON
Function image ON TIME * * * the time until the MUTE pin is set to high level after the STBY pin is set to high level OFF TIME Please secure OFF TIME of 1000msec or more for reducing Pop noise.
5V/DIV. STBY pin BIAS MUTE pin MUTECAP pin OFF TIME
OUTPUTS
AMP ON
Function image OFF TIME * * * the time until the STBY pin is set to low level after the MUTE pin is set to low level
No.A1408-13/24
LV49152V
SOFT MUTE The soft mute circuit is able to use fade in/fade out function, and can set Rise time and fall time by the time constant of the MUTECAP capacitor. FADE IN Mute rise time is Applpx.450msec in our recommended external components.
5V/DIV.
MUTE pin
MUTECAP pin
[OUT+] vs [OUT-]
Mute rise time
Function image FADE OUT Mute fall time is Applpx.450msec in our recommended external components.
5V/DIV.
MUTE pin
MUTECAP pin
[OUT+] vs [OUT-]
Mute fall time
Function image
No.A1408-14/24
LV49152V
Power supply lowering protection circuit Since the instable operation in the low voltage is prevented by using this circuit, after the voltage of the PVD pin is monitored and the voltage below the Attack voltage (PVD = 8V typ.), AMP is turned off. Also, to prevent the instable operation when the voltage of the PVD pin is decreased by any cause during operations, the Attack voltage (PVD = 7V typ.) is set. The voltage of Attack and Recover has hysteresis (About 1V) to prevent ON/OFF continuous action of the power supply lowering protection circuit.
VD terminal voltage Attack voltage Recover voltage
AMP. OFF
AMP. ON
AMP. OFF
Internal signal
Function image Also, this IC is designed to turn off AMP in the same sequence that the MUTE is on as a pop noise measures when the plug of products are put off. Over current protection circuit The over current protection circuit is a protection circuit * to protect the output DMOS from the over current and corresponds to any mode of the power supply, GND and a load short. The protection operation is performed when the current reaches the detection current value set out in IC and the output DMOS is compulsorily turned off for about 20sec. After compulsorily tuning off the output DMOS, when the Amplifier is automatically reset in usual operation and the over current flows continuously, the protection operation is performed again.
OUTPUT current
Protection operation Normal operation Internal signal
Function image * The over current protection circuit is a function to avoid the abnormal state like the output short-circuit temporarily. Unfortunately, we cannot guarantee that IC is not destroyed.
No.A1408-15/24
LV49152V
Thermal protection circuit The LV49152V includes a thermal protection circuit to prevent damage to or destruction of the IC should abnormal internal heat generation occur. This means that should the IC junction temperature (Tj) rise above about 175C due to inadequate heat dissipation or other reason, the thermal protection circuit will operate to stop IC operation should the temperature rise further. If the temperature is reduced by lowering the input level or other means, the thermal protection circuit will recover automatically (about 105C).
Recovery Hystsrisis Temperature (Tj) rise Internal TSD DET. PWM Shut down Attack
Internal TSD DET. PWM
Temperature (Tj) fall Shut down
40
50
60
70
80
90
100 110 110 130 110 150 160 170 180 190 200
Junction temperature Tj [C]
Function image * The thermal protection circuit is a function to avoid the abnormal state temporarily. Unfortunately, we cannot guarantee that IC is not destroyed.
No.A1408-16/24
LV49152V
PLC The PLC (power level control) function is able to control the maximum index modulation by setting a value of external PLC resistance R1 voluntarily, and prevent a PWM signal from becoming the over modulation mode. In addition, this circuit can be use as output power limit circuit because the PLC function can set the maximum index modulation voluntarily, and variable from 2W to 15W with output power linearly in the state that made the power supply voltage and load resistance fixation. Because the PLC function can set the suitable rated output with the same power supply voltage/speaker regardless of screen size in flat screen televisions by this, set can plan the commonization of the board. Furthermore, The PLC function can reduce abnormal noise in the hard clip so that output wave pattern becomes the soft clip when it limited output power.
MAX. Power Half Power Min. Power
PLC 5
LV49152V
R1
1F GND 13
Function image Measuring condition VD = 15V, RL = 8, L = 33H (TOKO : A7502BY-330M), C = 0.1uF,CL = 0.47F,Ta = 25C
R1 -- PO@THD + N = 10%
VD = 15V RL = 8 fin = 1kHz THD + N = 10% 2ch-Drive AES17
R1 [k] 3.0 3.6 4.7 6.2 7.5 8.2 9.1 10
4 2 0 0 2 4 6 8 10 12 14 16 18 20
18 16
Po@10% [W] 0.694 1.073 1.982 3.642 5.562 6.855 8.591 10.64 15.32 15.94 16.01
PO@THD + N = 10% - W
14 12 10 8 6
13 15 20
R1 - k
Setting example of the output power limit value * When it is used this function as output power limit, please use the high-precision resistance such as the metal film resistor when precision of the electricity value is necessary. * The value of external PLC resistance R1 please connects more than 3k. * When it is changed a value of external PLC resistance R1, please turn off an amplifier.
No.A1408-17/24
LV49152V
Cut-off frequency calculation method and the output LC filter setting
L
OUT+
C CL C OUTL RL
The cut off frequency fc of the output LC filter is calculated by the following formula. fc = 1 22LCL
Also, by setting the cut off frequency fc, the value of CL and L is calculated by using the following formula. 1 CL = 22 x RLfc L= 2 x RL 4 fc
In general, the value from 20% to 30% of CL is set to C. In case of fc = 30kHz
RL [] 4 6 8 16 L [H] 15 22 33 68 CL [F] 1 0.68 0.47 0.22 C [F] 0.22 0.15 0.1 0.047 Q 0.650 0.636 0.704 0.739
Above formula is common calculation method and is a measure of constant setting. In fact, it is necessary to set with each set that considers the speaker characteristics. In addition, please set the fixed number to become Q 1 in currents in the fc neighborhood increasing if Q value of the LC filter is big.
No.A1408-18/24
LV49152V
Glaph deta L = 33H (TOKO : A7502BY-330M), C = 0.1F, CL = 0.47F
0.15
Ist -- VD
RL = 8 Rg = 0 STBY = L MUTE = L
0.15
Ist -- Ta
VD = 15V RL = 8 Rg = 0 STBY = L MUTE = L
Standby current, Ist - A
0.1
Standby current, Ist - A
4 6 8 10 12 14 16 18
0.1
0.05
0.05
0 0 2
0 - 50
0
50
100
Externally applied voltage, VD - V
25
Ambient temperature, Ta - C
25
Imute -- VD
RL = 8 Rg = 0 STBY = H MUTE = L
Imute -- Ta
Muting current, Imute - mA
Muting current, Imute - mA
20
20
15
15
10
10
5
5
0 0 2 4 6 8 10 12 14 16 18
0 - 50
VD = 15V RL = 8 Rg = 0 STBY = H MUTE = L
0 50 100
Externally applied voltage, VD - V
50
Ambient temperature, Ta - C
50
ICC -- VD
RL = 8 Rg = 0 STBY = H MUTE = H
ICC -- Ta
Quiescent current, ICC - mA
Quiescent current, ICC - mA
4 6 8 10 12 14 16
40
40
30
30
20
20
10
10
0 0 2 18
0 - 50
VD = 15V RL = 8 Rg = 0 STBY = H MUTE = H
0 50 100
Externally applied voltage, VD - V
20
Ambient temperature, Ta - C
20
VCC -- VD
RL = 8 Rg = 0
VCC -- Ta
VD = 15V RL = 8 Rg = 0
15
15
VCC - V
10
VCC - V
2 4 6 8 10 12 14 16
10
5
5
0 0 18
0 - 50
0
50
100
Externally applied voltage, VD - V
Ambient temperature, Ta - C
No.A1408-19/24
LV49152V
10
BIASCAP -- VD
RL = 8 Rg = 0
10
BIASCAP -- Ta
VD = 15V RL = 8 Rg = 0
8
8
BIASCAP - V
6
BIASCAP - V
18
6
4
4
2
2
0 0 2 4 6 8 10 12 14 16
0 - 50
0
50
100
Externally applied voltage, VD - V
10
Ambient temperature, Ta - C
10
VBIAS -- VD
RL = 8 Rg = 0
VBIAS -- Ta
VD = 15V RL = 8 Rg = 0
8
8
VBIAS - V
VBIAS - V
6
6
4
4
2
2
0 0 2 4 6 8 10 12 14 16 18
0 - 50
0
50
100
Externally applied voltage, VD - V
6
Ambient temperature, Ta - C
6
VREG5 -- VD
RL = 8 Rg = 0
VREG5 -- Ta
5
5
VREG5 - V
VREG5 - V
4
4
3
3
2
2
1
1
0 0 2 4 6 8 10 12 14 16 18
0 - 50
VD = 15V RL = 8 Rg = 0
0 50 100
Externally applied voltage, VD - V
6
Ambient temperature, Ta - C
6
VDD -- VD
RL = 8 Rg = 0
VDD -- Ta
VD = 15V RL = 8 Rg = 0
5
5
4
4
VDD - V
VDD - V
0 18
3
3
2
2
1
1
0 2 4 6 8 10 12 14 16
0 - 50
0
50
100
Externally applied voltage, VD - V
Ambient temperature, Ta - C
No.A1408-20/24
LV49152V
32
VG -- VD
RL = 8 fin = 1kHz VO = 0dBm
Gain, VG - dB
32
VG -- Ta
VD = 15V RL = 8 fin = 1kHz VO = 0dBm
31
31
Gain, VG - dB
30
30
29
29
28 9 12 15 18
28 - 50
0
50
100
Externally applied voltage, VD - V
1 7
Ambient temperature, Ta - C
1 7
THD+N -- VD
Total harmonic distortion, THD+N - %
THD+N -- Ta
Total harmonic distortion, THD+N - %
5 3 2 0.1 7 5 3 2 0.01 7 5 3 2 0.001 9
5 3 2 0.1 7 5 3 2 0.01 7 5 3 2
CH2 CH1
CH2 CH1
RL = 8 fin = 1kHz PO = 1W 2ch-Drive AES17
12 15 18
0.01 - 50
VD = 15V RL = 8 fin = 1kHz PO = 1W 2ch-Drive AES17
0 50 100
Externally applied voltage, VD - V
- 50
Ambient temperature, Ta - C
- 50
CHsep. -- VD
Channel separation, CHsep. - dB
CHsep. -- Ta
VD = 15V RL = 8 Rg = 0 VO = 0dBm DIN AUDIO
Channel separation, CHsep. - dB
RL = 8 fin = 1kHz Rg = 0 VO = 0dBm DIN AUDIO
- 60
- 60
- 70
- 70
CH1CH2 CH2CH1
- 80 9 12 15 18
CH1CH2 CH2CH1
- 80 - 50 0 50 100
Externally applied voltage, VD - V
0
Ambient temperature, Ta - C
0
SVRR -- VD
Ripple rejection ratio, SVRR - dB
SVRR -- Ta
VD = 15V RL = 8 Rg = 0 VDr = 0dBm DIN AUDIO
Ripple rejection ratio, SVRR - dB
- 20
RL = 8 fin = 100Hz Rg = 0 VDr = 0dBm DIN AUDIO
- 20
- 40
- 40
- 60
CH1 CH2
- 60
CH1 CH2
- 80 9 12 15 18
- 80 - 50
0
50
100
Externally applied voltage, VD - V
Ambient temperature, Ta - C
No.A1408-21/24
LV49152V
1 7 5
VNO -- VD
RL = 8 Rg = 0 A-weight
Noise, VNO - mVrms
1 7 5 3 2
VNO -- Ta
VD = 15V RL = 8 Rg = 0 Rplc = 20k A-weight
Noise, VNO - mVrms
3 2
0.1 7 5 3 2
CH2 CH1
0.1 7 5 3 2
CH2 CH1
0.01 9 12 15 18
0.01 - 50
0
50
100
Externally applied voltage, VD - V
450
Ambient temperature, Ta - C
450
fO -- VD
RL = 8 Rg = 0
Oscillating frequency, fO - kHz
fO -- Ta
VD = 15V RL = 8 Rg = 0
Oscillating frequency, fO - kHz
400
400
CH1
350
CH1
350
CH2
CH2
300 9 12 15 18
300 - 50
0
50
100
Externally applied voltage, VD - V
60
Ambient temperature, Ta - C
60
DUTY -- VD
RL = 8 Rg = 0 CH1 CH2
DUTY -- Ta
CH2 CH1
50
50
40
40
DUTY - %
30
DUTY - %
30
20
20
10
10
0 9 12 15 18
0 - 50
VD = 15V RL = 8 Rg = 0
0 50 100
Externally applied voltage, VD - V
36 32 28
Ambient temperature, Ta - C
100 7 5 3 2
PO -- VD
fin = 1kHz THD+N = 10% 2ch-Drive AES17
=4
Output power, PO - W
PO -- VIN
VD = 15V fin = 1kHz 2ch-Drive AES17
RL = 4
RL = 8
Output power, PO - W
RL
24 20 16 12 8 4 0 9 12 15
RL
=6
=8
RL
10 7 5 3 2 1 7 5 3 2 0.1 7 5 3 2 0.01
18
10
2
3
5
7
100
2
3
5
7 1000
Externally applied voltage, VD - V
Input voltage, VIN - mVp
No.A1408-22/24
LV49152V
Total harmonic distortion, THD+N - % Total harmonic distortion, THD+N - %
10 7 5 3 2 1 7 5 3 2 0.1 7 5 3 2
THD+N -- PO
VD = 15V RL = 8 2ch-Drive AES17
7k Hz
10 7 5 3 2 1 7 5 3 2 0.1 7 5 3 2 0.01 7 5 3 2 0.001
THD+N -- f
VD = 15V RL = 8 PO = 1W 2ch-Drive AES17
fin
.6 =6
fin
k =1
Hz
CH1 CH2
fin =
100H
z
0.01 0.001 2 3 5 70.01 2 3 5 7 0.1 2 3 5 7 1
2 3 5 7 10
2 3 57 100
10
23
5 7 100
23
5 7 1k
23
5 7 10k
23
57 100k
Output power, PO - W
10 7 5 3 2 1 7 5 3 2 0.1 7 5 3 2
Frequency, f - Hz
10 7 5 3 2 1 7 5 3 2 0.1 7 5 3 2 0.01 7 5 3 2 0.001
THD+N -- PO
THD+N -- f
VD = 15V RL = 6 PO = 1W 2ch-Drive AES17
Total harmonic distortion, THD+N - %
fin
=
7 6.6
kH
z
Total harmonic distortion, THD+N - %
VD = 15V RL = 6 2ch-Drive AES17
fin =
1kH
z
CH1 CH2 L = 22H C = 0.15F CL = 0.68F
23 5 7 100 23 5 7 1k 23 5 7 10k 23 57 100k
0.01 0.001 2 3 5 70.01 2 3 5 7 0.1 2 3 5 7 1
L = 22H C = 0.15F CL = 0.68F
fin =
100H
z
2 3 57 100
2 3 5 7 10
10
Output power, PO - W
10 7 5 3 2 1 7 5 3 2 0.1 7 5 3 2
Frequency, f - Hz
10 7 5 3 2 1 7 5 3 2 0.1 7 5 3 2 0.01 7 5 3 2 0.001
THD+N -- PO
THD+N -- f
VD = 15V RL = 4 PO = 1W 2ch-Drive AES17
Total harmonic distortion, THD+N - %
fin
=
6
k .67
Hz
Total harmonic distortion, THD+N - %
VD = 15V RL = 4 2ch-Drive AES17
1k fin =
Hz
CH1 CH2 L = 15H C = 0.22F CL = 1F
23 5 7 100 23 5 7 1k 23 5 7 10k 23 57 100k
0.01 0.001 2 3 5 7 0.01 2 3 5 70.1 2 3 5 7 1
L = 15H C = 0.22F CL = 1F
fin =
100
Hz
2 3 5 7 10
2 3 57 100
10
Output power, PO - W
10
Frequency, f - Hz
20
Response -- f
Phase -- f
VD = 15V RL = 8 PO = 1W
0
0
Response - dB
Phase - deg
- 20
- 10
- 40
- 20 - 60
- 30 10 2 3 5 7100 2 3 5 7 1k 2 3 5 710k 2 3 5 7 1000k 100k 2 3 5 7
- 80
VD = 15V RL = 8 PO = 1W
23 5 7 100 23 5 7 1k 23 5 7 10k 23 5 7100k
10
Frequency, f - Hz
Frequency, f - Hz
No.A1408-23/24
LV49152V
- 50
CHsep. -- f
VD = 15V RL = 8 Rg = 0 VO = 0dBm DIN AUDIO
1 7 5
VNO -- Rg
VD = 15V RL = 8 A-weight
Channel separation, CHsep. - dB
- 60
Noise, VNO - mVrms
3 2
0.1 7 5 3 2
CH2 CH1
- 70
CH1CH2 CH2CH1
- 80 10 23 5 7 100 23 5 7 1k 23 5 7 10k 23 5 7100k
0.01 1 2 3 5 7 10 2 3 5 7100 2 3 5 7 1k 2 3 5 710k 2 3 5 7 100k
Frequency, f - Hz
0
Rg -
SVRR -- fr
VD = 15V RL = 8 Rg = 0 Vr = 0dBm DIN AUDIO
Efficiency - %
100
Efficiency -- PO
RL = 8
RL = 4
Ripple rejection ratio, SVRR - dB
80
- 20
60
- 40
40
- 60
CH1
20
CH2
- 80 10 23 5 7 100 23 5 7 1k 23 5 7 10k 23 57 100k 0.001 0 2 4 6 8 10 12 14
VD = 15V fin = 1kHz 2ch-Drive AES17
16 18 20
Ripple Frequency, fr - Hz
Output power, PO - W
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above.
This catalog provides information as of April, 2009. Specifications and information herein are subject to change without notice. PS No.A1408-24/24


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